1.VLSI Design 2012 Conference Committee - IEEE Xplore
VLSI Design 2012 Conference Committee. Steering Committee Chair ... Design Contest Chairs. Madhavi Latha ... K. Lal Kishore. JNTU Hyderabad, India.
2.Download - Aircc
LOW POWER VLSI DESIGN WITH RESISTIVE FEEDBACK LOGIC. 1C.Ashok Kumar, 2Dr.B.K.Madhavi, 3Dr.K.Lal Kishore. 1. Prof.& Head, ECE dept, TRR Engg.
3.SRAM CELL BASED ON CNTFET AT 32nm - Aircc
International Journal of VLSI design & Communication Systems (VLSICS) ..... Dr. K Lal Kishore is a Senior Professor in Electronics and Communications Engg.
4.A 80Ms/sec 10bit PIPELINED ADC Using 1.5Bit Stages And ... - Aircc
International Journal of VLSI design & Communication Systems (VLSICS) Vol.2, No.3, September 2011. DOI : 10.5121/vlsic. ... 1 and Prof.K.Lal Kishore. 2.
5.SVL leakage current technique applied in 1-bit adder in VLSI - IASIR ...
SVL leakage current technique applied in 1-bit adder in VLSI ... Used a design rule checker (DRC) for any implementation fault in the .... Rajendra Prasad S, B K Madhavi, K Lal Kishore, “Reduction Of Leakage-Power In Cntfet Sram Cell Using ...
6.22nd IEEE International Conf. on VLSI Design, 5-9 January 2008 ...
Adavnced VLSI Design Lab., IIT Kharagpur, Kharagpur-721302 .... Nano Scale Device Research Laboratory Centre for Electronics Design ... K. Lal Kishore.
7.An Adder with Novel PMOS and NMOS for Ultra Low ...
By Ch. Ashok Babu, J.V.R. Ravindra & K. Lal Kishore. Amity University, India. Abstract- Power has become a burning issue in modern VLSI design, as the ...
8.Download - International Journal of Engineering Research
Oct 1, 2013 ... K.Lal kishore. 3 ... EMI effect in the design of the internal on chip power distribution networks ... scale integration (VLSI) circuits –. As the ...